1. Field of the Invention
This invention relates to the field of integrated circuits and, more particularly, to the assignment of input/output objects to input/output banks of an integrated circuit.
2. Description of the Related Art
Modern programmable logic devices (PLDs), such as field programmable gate arrays (FPGAs), are capable of supporting a variety of different input/output (I/O) standards. Examples of I/O standards can include, but are not limited to, different varieties of Gunning Transceiver Logic (GTL) signaling such as GTL, GTL_DCI, and GTLP_DCI, Low Voltage Differential Signaling LVDS25, LVCMOS25, and the like. Each of these I/O standards specifies a set of attributes such as whether a reference voltage VREF is necessary, the value of any required VREF, whether a voltage supply VCC is needed for input (VCCI) or output (VCCO), and/or the value of any required VCCI or VCCO. This listing of I/O standards and attributes is not intended to be exhaustive, but rather illustrative of the many varieties of I/O standards and corresponding attributes.
Most modern PLDs organize I/O objects of a circuit design into a limited number of physical I/O banks on the PLD. A PLD can include approximately 8 I/O banks, although this number is not definitive of every type of PLD as different PLDs can include varying numbers of I/O banks. In any case, each I/O bank can be associated with a plurality of different I/O objects. The I/O objects that are assigned to a given I/O bank must be configured according to compatible I/O standards. As such, the placement of I/O objects into a given I/O bank can be said to be constrained by the organization of that I/O bank.
In illustration, some I/O standards require a specific VCCI or VCCO. An I/O bank typically has a single VCC supply. Accordingly, only I/O objects configured according to I/O standards that have compatible VCC requirements can be assigned to the same I/O bank. Other attributes of I/O standards serve to further restrict the field of I/O banks to which a given I/O object can be assigned.
The task of assigning I/O objects to I/O banks is commonly referred to as the “Select I/O placement problem”. Conventional solutions for Select I/O placement divide the problem into two different phases. The first phase attempts to find a non-optimal, legal solution that satisfies all non-Select I/O related constraints concerning I/O placement. The second phase seeks to improve the solution to achieve placement legality with regard to the Select I/O constraints.
Past techniques for solving the select I/O placement problem have relied upon heuristics to automate I/O placement. One heuristic-based approach utilizes a combination of simulated annealing, bipartite matching, and constructive bin-packing to find a solution. Heuristic-based techniques, however, do have disadvantages. In particular, heuristic-driven techniques are not guaranteed to determine a feasible I/O placement solution despite the existence of a solution. Further, heuristic techniques are not capable of identifying an inherently infeasible circuit design.
Another proposed solution for the I/O placement problem relies upon an Integer Linear Programming (ILP) formulation of the problem. This solution seeks to overcome the uncertainties inherent to heuristic approaches discussed above. The ILP model includes provisions for addressing voltage constraints when assigning I/O objects to physical I/O banks. Other attributes of I/O standards, however, are not addressed. Specifically, the ILP model lacks any mechanism for dealing with special termination types. Reformulating, or expanding, the ILP model to accommodate such additional attributes is extremely difficult.
It would be beneficial to perform I/O placement in a manner which overcomes the limitations described above.